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MCP14628
2A Synchronous Buck Power MOSFET Driver
Features
* Dual Output MOSFET Driver for Synchronous Applications * High Peak Output Current: 2A (typical) * Adaptive Cross Conduction Protection * Internal Bootstrap Blocking Device * +36V BOOT Pin Maximum Rating * Enhanced Light Load Efficiency Mode * Low Supply Current: 80 A (typical) * High Capacitive Load Drive Capability: - 3300 pF in 10 ns (typical) * Tri-State PWM Pin for Power Stage Shutdown * Input Voltage Undervoltage Lockout Protection * Space Saving Packages: - 8-Lead SOIC - 8-Lead 3x3 DFN
General Description
The MCP14628 is a dual MOSFET gate driver designed to optimally drive two N-Channel MOSFETs arranged in a non-isolated synchronous buck converter topology. With the capability to source 2A peaks typically from both the high-side and low-side drives, the MCP14628 is an ideal companion to buck controllers that lack integrated gate drivers. Additionally, greater design flexibility is offered by allowing the gate drivers to be placed close to the power MOSFETs. The MCP14628 features the capability to sink 3.5A peak typically for the low-side gate drive. This allows the MCP14628 the capability of holding off the low-side power MOSFET during the rising edge of the PHASE node. Internal adaptive cross conduction protection circuitry is also used to mitigate both external power MOSFETs from simultaneously conducting. The low resistance pull-up and pull-down drives allow the MCP14628 to quickly transition a 3300 pF load in typically 10 ns and with a propagation time of typically 20 ns. Bootstrapping for the high-side drive is internally implemented which allows for a reduced system cost and design complexity. The PWM input to the MCP14628 can be tri-stated to force both drive outputs low for true power stage shutdown. Light load system efficiency is improved by using the diode emulation feature of the MCP14628. When the FCCM pin is grounded, diode emulation mode is entered. In this mode, discontinuous conduction is allowed by sensing when the inductor current reach zero and turning off the low-side power MOSFET.
Applications
* High Efficient Synchronous DC/DC Buck Converters * High Current Low Output Voltage Synchronous DC/DC Buck Converters * High Input Voltage Synchronous DC/DC Buck Converters * Core Voltage Supplies for Microprocessors
Package Types
8-Lead SOIC 1 2 3 4 8 7 6 5 HIGHDR BOOT PWM GND 1 2 3 4 8-Lead DFN
HIGHDR BOOT PWM GND
PHASE FCCM VCC LOWDR
8 7 6 5
PHASE FCCM VCC LOWDR
Note 1: Exposed pad on the DFN is electrically isolated.
(c) 2008 Microchip Technology Inc.
DS22083A-page 1
MCP14628
Typical Application Schematic
CBOOT VSUPPLY = 12V BOOT VCC = 5V CURRENT SENSE QH
MCP14628
VCC FCCM CONTROL FCCM PWM UGATE PHASE LGATE GND
QL
VEXT
MCP1630
VCC CURRENT SENSE CS OSC IN FB
COMP VREF
GND REFERENCE VOLTAGE OSCILLATOR FROM MCU
Functional Block Diagram
VCC
BOOT
FCCM
Level Shift R
HIGHDR
PWM R
Control Logic & Protection VCC
PHASE
LOWDR
GND
DS22083A-page 2
(c) 2008 Microchip Technology Inc.
MCP14628
1.0 ELECTRICAL CHARACTERISTICS
Notice: Stresses above those listed under "Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational sections of this specification is not intended. Exposure to maximum rating conditions for extended periods may affect device reliability.
Absolute Maximum Ratings
VCC, Device Supply Voltage............................. -0.3V to +7.0V VBOOT, BOOT Voltage.................................... -0.3V to +36.0V VPHASE, Phase Voltage........... VBOOT - 7.0V to VBOOT + 0.3V VFCCM, FCCM Voltage ........................... -0.3V to VCC + .0.3V VPWM, PWM Voltage ............................... -0.3V to VCC + 0.3V VUGATE, UGATE Voltage ....... VPHASE - 0.3V to VBOOT + 0.3V VLGATE, LGATE Voltage .......................... -0.3V to VCC + 0.3V ESD Protection on all Pins ....................................2 kV (HBM)
DC CHARACTERISTICS
Electrical Specifications: Unless otherwise noted, VCC = 5V, TJ = -40C to +125C Parameters VCC Supply Requirements Recommended Operating Range Bias Supply Voltage UVLO (Rising VCC) UVLO (Falling VCC) Hysteresis PWM Input Requirements PWM Input Current PWM Rising Threshold PWM Falling Threshold Tri-State Shutdown Hold-off Time FCCM input Requirements FCCM Low Threshold FCCM High Threshold Output Requirements High Drive Source Resistance High Drive Sink Resistance High Drive Source Current High Drive Sink Current Low Drive Source Resistance Low Drive Sink Resistance Low Drive Source Current Low Drive Sink Current Note 1: 2: -- -- -- -- -- -- -- -- 1.0 1.0 2.0 2.0 1 0.5 2.0 3.5 2.5 2.5 -- -- 2.5 1.0 -- -- A A A A 500 mA source current, Note 1 500 mA sink current, Note 1 Note 1 Note 1 500 mA source current, Note 1 500 mA sink current, Note 1 Note 1 Note 1 0.50 -- -- -- -- 2.0 V V tTSSHD IPWM -- -- 0.70 3.50 100 250 -250 1.00 3.80 175 -- -- 1.30 4.10 250 A A V V ns TA = +25C, Note 2 VPWM = 5V VPWM = 0V VCC IVCC 4.5 -- -- 2.40 -- 5.0 80 3.40 2.90 500 5.5 -- 3.90 -- -- V A V V mV PWM pin floating, VFCCM = 5V Sym Min Typ Max Units Conditions
Parameter ensured by design, not production tested. See Figure 4-1 for parameter definition.
(c) 2008 Microchip Technology Inc.
DS22083A-page 3
MCP14628
DC CHARACTERISTICS (CONTINUED)
Electrical Specifications: Unless otherwise noted, VCC = 5V, TJ = -40C to +125C Parameters Switching Times HIGHDR Rise Time LOWDR Rise Time HIGHDR Fall Time LOWDR Fall Time HIGHDR Turn-off Propagation Delay LOWDR Turn-off Propagation Delay HIGHDR Turn-on Propagation Delay LOWDR Turn-on Propagation Delay Tri-State Propagation Delay tRH tRL tFH tFL tPDLH tPDLL tPDHH tPDHL tPTS -- -- -- -- -- -- 10 10 -- 10 10 10 6.0 15 16 18 22 35 -- -- -- -- -- -- 30 30 -- -- ns ns ns ns ns ns ns ns ns ns CL = 3.3nF, Note 1, Note 2 CL = 3.3nF, Note 1, Note 2 CL = 3.3nF, Note 1, Note 2 CL = 3.3nF, Note 1, Note 2 No Load, Note 2 No Load, Note 2 No Load, Note 2 No Load, Note 2 No Load, Note 2 FCCM pin low Note 1 Sym Min Typ Max Units Conditions
Minimum LOWDR On Time in DCM tLGMIN -- 400 Note 1: Parameter ensured by design, not production tested. 2: See Figure 4-1 for parameter definition.
TEMPERATURE CHARACTERISTICS
Electrical Specifications: Unless otherwise noted, all parameters apply with VCC = 5V. Parameter Temperature Ranges Specified Temperature Range Maximum Junction Temperature Storage Temperature Package Thermal Resistances Thermal Resistance, 8L-SOIC Thermal Resistance, 8L-DFN (3x3) JA JA -- -- 149.5 60.0 -- -- C/W C/W Typical Four-layer board with vias to ground plane TA TJ TA -40 -- -65 -- -- -- +85 +150 +150 C C C Sym Min Typ Max Units Comments
DS22083A-page 4
(c) 2008 Microchip Technology Inc.
MCP14628
2.0
Note:
TYPICAL PERFORMANCE CURVES
The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
Note: Unless otherwise indicated, TA = +25C with VCC = 5.0V.
25 tRH 20 Rise Time (ns) 15 10 5 0 0 1500 3000 4500 6000 7500 Capacitive Load (pF) tRL
Fall Time (ns) 20 15 10 tFL 5 0 0 1500 3000 4500 6000 7500 Capacitive Load (pF) 25 tFH
FIGURE 2-1: Load.
14 13 12 Time (ns) 11 10 9 8 7 6 -40 -25 -10 5
Rise Times vs. Capacitive
FIGURE 2-4: Load.
12
Fall Times vs. Capacitive
CLOAD = 3,300 pF tRH
Time (ns)
11 10
CLOAD = 3,300 pF tRL
tFH
9 8 7 6 5 4 tFL
20 35 50 65 80 95 110 125 Temperature (C)
-40 -25 -10
5
20 35 50 65 80 95 110 125 Temperature (C)
FIGURE 2-2: vs. Temperature.
24 Propagation Delay (ns) 22 20 18 16 14 12 10 -40 -25 -10 5 tPDHH
HIGHDR Rise and Fall Time
FIGURE 2-5: vs. Temperature.
30
LOWDR Rise and Fall Time
CLOAD = 3,300 pF Time (ns)
28 26 24 22 20 18 16 14 12
CLOAD = 3,300 pF
tPDLH
tPDHL
tPDLL
20 35 50 65 80 95 110 125 Temperature (C)
-40 -25 -10
5
20 35 50 65 80 95 110 125 Temperature (C)
FIGURE 2-3: vs. Temperature.
HIGHDR Propagation Delay
FIGURE 2-6: vs. Temperature.
LOWDR Propagation Delay
(c) 2008 Microchip Technology Inc.
DS22083A-page 5
MCP14628
Typical Performance Curves (Continued)
Note: Unless otherwise indicated, TA = +25C with VCC = 5.0V.
70 Supply Current (mA)
Supply Current (A)
700 680 660 640 620 600 580
CLOAD = 3,300 pF FSW = 12.5 kHz Duty Cycle = 30%
60 50 40 30 20 10
CLOAD = 3,300 pF Duty Cycle = 30%
0 100
1000 Frequency (kHz)
10000
-40 -25 -10
5
20
35
50
65
80
95 110 125
Temperature (C)
FIGURE 2-7: Frequency.
Supply Current vs.
FIGURE 2-10: Temperature.
Supply Current vs.
FIGURE 2-8: Operation.
DCM to CCM Transition
FIGURE 2-11: Operation.
CCM to DCM Transition
FIGURE 2-9: (0.5A - 15A).
Load Transition
FIGURE 2-12: (15A - 0.5A).
Load Transition
DS22083A-page 6
(c) 2008 Microchip Technology Inc.
MCP14628
Typical Performance Curves (Continued)
Note: Unless otherwise indicated, TA = +25C with VCC = 5.0V.
FIGURE 2-13: Operation.
HIGHDR and LOWDR
(c) 2008 Microchip Technology Inc.
DS22083A-page 7
MCP14628
3.0 PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 3-1.
TABLE 3-1:
SOIC 1 2 3 4 5 6 7 8 --
PIN FUNCTION TABLE .
3x3 DFN 1 2 3 4 5 6 7 8 PAD Symbol HIGHDR BOOT PWM GND LOWDR VCC FCCM PHASE NC Description High-side Gate Driver Pin Floating Bootstrap Supply Pin PWM Input Control Pin Ground Low-side Gate Driver Pin Supply Input Voltage Forced Continuous Conduction Mode Pin Switch Node Pin Exposed Metal Pad
3.1
High-side Gate Driver Pin (HIGHDR)
3.6
Supply Input Voltage Pin (VCC)
The HIGHDR pin provides the gate drive signal to control the high-side power MOSFET. The gate of the high-side power MOSFET is connected to this pin.
The VCC pin provides bias to the MCP14628. A bypass capacitor is to be placed between this pin and the GND pin. This capacitor should be placed as close to the MCP14628 as possible.
3.2
Floating Bootstrap Supply Pin (BOOT)
3.7
Forced Continuous Conduction Mode Pin (FCCM)
The BOOT pin is the floating bootstrap supply pin for the high-side gate drive. A capacitor is connected between this pin and the PHASE pin to provide the necessary charge to turn on the high-side power MOSFET.
The FCCM pin enables or disables the forced continuous conduction mode. With the FCCM pin connected to ground the MCP14628 enters a diode emulation mode to improve system efficiency at light loads. Continuous conduction is forced if the FCCM pin is connected to VCC.
3.3
PWM Input Control Pin (PWM)
The control input signal is supplied to the PWM pin. This tri-state pin controls the state of the HIGHDR and LOWDR pins. Placing a voltage equal to VCC/2 on this pin causes both the HIGHDR and LOWDR to a low state.
3.8
Switch Node Pin (PHASE)
The PHASE pin provides the return path for the highside gate driver. The source of the high-side power MOSFET is connected to this pin.
3.9 3.4 Ground Pin (GND)
The GND pin provides ground for the MCP14628 circuitry. It should have a low impedance connection to the bias supply source return. High peak currents will flow out the GND pin when the low-side power MOSFET is being turned off.
DFN Exposed Pad
The exposed metal pad of the DFN package is not internally connected to any potential. Therefore, this pad can be connected to a ground plane or other copper plane on a printed circuit board to aid in heat removal from the package.
3.5
Low-side Gate Driver Pin (LOWDR)
The LOWDR pin provides the gate drive signal to control the low-side power MOSFET. The gate of the low-side power MOSFET is connected to this pin.
DS22083A-page 8
(c) 2008 Microchip Technology Inc.
MCP14628
4.0
4.1
DETAILED DESCRIPTION
Device Overview
4.4
Tri-State PWM
The MCP14628 is a dual MOSFET gate driver designed to optimally drive both high-side and low-side N-channel MOSFETs arranged in a non-isolated synchronous buck converter topology. The MCP14628 is capable of suppling 2A (typical) peak current to the floating high-side power MOSFET that is connected to the HIGHDR pin. With the exception of a capacitor, all of the circuitry needed to drive this high-side N-channel MOSFET is internal to the MCP14628. A blocking device is placed between the VCC and BOOT pins that allows the bootstrap capacitor to be charged to VCC when the low-side power MOSFET is conducting. Refer to Section 5.1, for information on determining the proper size of the bootstrap capacitor. The HIGHDR is also capable of sinking 2A (typical) peak current. The LOWDR is capable of sourcing 2A (typical) peak current and sinking 3.5A (typical) peak current. This helps ensure that the low-side power MOSFET stays turned off during the high dv/dt of the PHASE node.
The PWM input pin of the MCP14628 controls the high current LOWDR and HIGHDR drive signals. These signals have three distinct operating modes depending upon the state of the PWM input signal. A logic low on the PWM pin cause the LOWDR drive signal to be high and the HIGHDR drive signal to be low. When the PWM signal transitions to a logic high, the LOWDR signal goes low and the HIGHDR signal go high. To ensure proper operation the PWM input signal should be capable of a logic low of 0V and a logic high of 5V. The third operating mode of the drive signals occurs when the PWM signal is set to a value equal to VCC/2 (typically). When the PWM signal dwells at this voltage for 175 ns (typically) the MCP14628 disables both LOWDR and HIGHDR drive signals. Both drive signals are pulled and held low. Once the PWM signal moves beyond VCC/2, the MCP14628 removes the shutdown state of the drive signals.
4.2
Adaptive Cross-Conduction Protection
The MCP14628 prevents cross-conduction power loss by adaptively ensuring that the high-side and low-side power MOSFETs are not conducting simultaneously. When the PWM signal goes low, the HIGHDR is pulled low and the LOWDR signal is held low until the HIGHDR reach 1V (typically). At that time, the LOWDR is allowed to turn on.
4.3
FCCM Mode
The MCP14628 features a diode emulation mode to enhance the light load system efficiency. The FCCM pin enables or disables the diode emulating mode. With the FCCM pin grounded, diode emulation mode is entered. The forced continuous conduction mode is entered when the FCCM pin is connected to VCC. In diode emulation mode, the MCP14628 turns off the low-side power MOSFET when the inductor current reaches approximately zero even if the PWM input signal is still low. The LOWDR and HIGHDR both stay low until the next switching cycle begins. To prevent false termination of the LOWDR signal, there is a 400 ns minimum on time, tLGMIN, of the LOWDR. This also ensures that the bootstrap capacitor is fully charged. In forced continuous conduction mode, the LOWDR of the MCP14628 does not terminate until the PWM input signal transitions from a low to a high.
(c) 2008 Microchip Technology Inc.
DS22083A-page 9
MCP14628
4.5 Timing Diagram
The PWM signal applied to the MCP14628 is suppled by a controller IC that regulates the power supply output. The timing diagram in Figure 4-1 graphically depicts the PWM signal and the output signals of the MCP14628. VCC PWM
tPDHH tPDLH tFH
HIGHDR tRH
1V
LOWDR 1V tPDHL tRL
tPDLL
tFL
VCC VCC/2 PWM tRH tPTS HIGHDR tTSSHD tFH 0V
LOWDR
1V tTSSHD tFL
tPTS
FIGURE 4-1:
MCP14628 Timing Diagram.
DS22083A-page 10
(c) 2008 Microchip Technology Inc.
MCP14628
5.0
5.1
APPLICATION INFORMATION
Bootstrap Capacitor Select
EQUATION 5-2:
P Q = I VCC x V CC
Where: PQ IVCC VCC = = = Quiescent Power Loss No Load Bias Current Bias Voltage
The selection of the bootstrap capacitor is based upon the total gate charge of the high-side power MOSFET and the allowable droop in gate drive voltage while the high-side power MOSFET is conducting.
EQUATION 5-1:
Q GATE C BOOT ----------------------V DROOP
Where: CBOOT QGATE VDROOP = = = bootstrap capacitor value total gate charge of the highside MOSFET allowable gate drive voltage droop
The main power loss occurs from the gate charge power loss. This power loss can be defined in terms of both the high-side and low-side power MOSFETs.
EQUATION 5-3:
P GATE = P HIGHDR + P LOWDR P HIGHDR = V CC x Q HIGH x F SW P LOWDR = V CC x Q LOW x F SW
Where: PGATE = = = = = = = Total Gate Charge Power Loss High-Side Gate Charge Power Loss Low-Side Gate Charge Power Loss Bias Supply Voltage High-Side MOSFET Total Gate Charge Low-Side MOSFET Total GAte Charge Switching Frequency
For example: QGATE = 30 nC VDROOP = 200 mV CBOOT 0.15 uF A low ESR ceramic capacitor is recommend with a maximum voltage rating that exceeds the maximum input voltage, VCC, plus the maximum supply voltage, VSUPPLY. It is also recommended that the capacitance of CBOOT not exceed 1.2 uF.
PHIGHDR PLOWDR VCC QHIGH QLOW FSW
5.2
Decoupling Capacitor 5.4
Proper decoupling of the MCP14628 is highly recommended to help ensure reliable operation. This decoupling capacitor should be placed as close to the MCP14628 as possible. The large currents required to quickly charge the capacitive loads are provided by this capacitor. A low ESR ceramic capacitor is recommended.
PCB Layout
Proper PCB layout is important in a high current, fast switching circuit to provide proper device operation. Improper component placement may cause errant switching, excessive voltage ringing, or circuit latch-up. There are two important states of the MCP14628 outputs, high and low. Figure 5-1 depicts the current flow paths when the outputs of the MCP14628 are high and the power MOSFETs are turned on. Charge needed to turn on the low-side power MOSFET comes from the decoupling capacitor CVCC. Current flows from this capacitor through the internal LOWDR circuitry, into the gate of the low-side power MOSFET, out the source, into the ground plane, and back to CVCC. To reduce any excess voltage ringing or spiking, the inductance and area of this current loop must be minimized.
5.3
Power Dissipation
The power dissipated in the MCP14628 consists of the power loss associated with the quiescent power and the gate charge power. The quiescent power loss can be calculated by the following equation and is typically negligible compared to the gate drive power loss.
(c) 2008 Microchip Technology Inc.
DS22083A-page 11
MCP14628
CBOOT The following recommendations should be followed to allow for optimal circuit performance. VSUPPLY - The components that construct the high current paths previously mentioned should be placed close the MCP14628. The traces used to construct these current loops should be wide and short to keep the inductance and impedance low. - A ground plane should be used to keep both the parasitic inductance and impedance minimized. The MCP14628 is capable of sourcing and sinking high peaks current and any extra parasitic inductance or impedance will result in non-optimal performance.
MCP14628
PWM
Control Logic
VCC
CVCC
FIGURE 5-1:
Turn On Current Paths.
The charge needed for the turning on of the high-side power MOSFET comes from the bootstrap capacitor CBOOT. Current flows from CBOOT through the internal HIGHDR circuitry, into the gate of the high-side power MOSFET, out the source, and back to CBOOT. The printed circuit board traces that construct this current loop need to have a small area and low inductance. To control the inductance, short and wide traces must be used. Figure 5-2 depicts the current flow paths when the outputs of the MCP14628 are low and the power MOSFETs are turned off. These current paths should also have low inductance and a small loop area to minimize voltage ringing and spiking. CBOOT
VSUPPLY
MCP14628
PWM
Control Logic
VCC
CVCC
FIGURE 5-2:
Turn Off Current Paths.
DS22083A-page 12
(c) 2008 Microchip Technology Inc.
MCP14628
6.0
6.1
PACKAGING INFORMATION
Package Marking Information (Not to Scale)
8-Lead DFN Example:
XXXX YYWW NNN
CABA 0812 256
8-Lead SOIC (150 mil) XXXXXXXX XXXXYYWW NNN
Example: 14628E SN^^812 e3 256
Legend: XX...X Y YY WW NNN
e3
*
Customer-specific information Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week `01') Alphanumeric traceability code Pb-free JEDEC designator for Matte Tin (Sn) This package is Pb-free. The Pb-free JEDEC designator ( e3) can be found on the outer packaging for this package.
Note:
In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information.
(c) 2008 Microchip Technology Inc.
DS22083A-page 13
MCP14628
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DS22083A-page 14
(c) 2008 Microchip Technology Inc.
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DS22083A-page 15
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DS22083A-page 16
(c) 2008 Microchip Technology Inc.
MCP14628
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(c) 2008 Microchip Technology Inc.
DS22083A-page 17
MCP14628
NOTES:
DS22083A-page 18
(c) 2008 Microchip Technology Inc.
MCP14628
APPENDIX A: REVISION HISTORY
Revision A (March 2008)
* Original Release of this Document.
(c) 2008 Microchip Technology Inc.
DS22083A-page 19
MCP14628
NOTES:
DS22083A-page 20
(c) 2008 Microchip Technology Inc.
MCP14628
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO. Device -X Temperature Range /XX Package Examples:
a) b) Device MCP14628 MCP14628T 2A Synchronous Buck Power MOSFET Driver 2A Synchronous Buck Power MOSFET Driver Tape and Reel MCP14628-E/MF: MCP14628T-E/MF: 2A Synchronous Driver 8LD DFN Package Tape and Reel, 2A Synchronous Driver 8LD DFN Package 2A Synchronous Driver 8LD SOIC Package Tape and Reel, 2A Synchronous Driver 8LD SOIC Package
c) d)
MCP14628-E/SN: MCP14628T-E/SN:
Temperature Range
E
= -40C to +85C
Package
MF SN
= Dual Flat, No Lead (3x3mm Body), 8-Lead = Plastic SOIC (150 mil Body), 8-Lead
(c) 2008 Microchip Technology Inc.
DS22083A-page 21
MCP14628
NOTES:
DS22083A-page 22
(c) 2008 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices: * * Microchip products meet the specification contained in their particular Microchip Data Sheet. Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip's Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. Microchip is willing to work with the customer who is concerned about the integrity of their code. Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as "unbreakable."
*
* *
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip's code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer's risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights.
Trademarks The Microchip name and logo, the Microchip logo, Accuron, dsPIC, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro, PICSTART, PRO MATE, rfPIC and SmartShunt are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. FilterLab, Linear Active Thermistor, MXDEV, MXLAB, SEEVAL, SmartSensor and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. Analog-for-the-Digital Age, Application Maestro, CodeGuard, dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN, ECONOMONITOR, FanSense, In-Circuit Serial Programming, ICSP, ICEPIC, Mindi, MiWi, MPASM, MPLAB Certified logo, MPLIB, MPLINK, mTouch, PICkit, PICDEM, PICDEM.net, PICtail, PIC32 logo, PowerCal, PowerInfo, PowerMate, PowerTool, REAL ICE, rfLAB, Select Mode, Total Endurance, UNI/O, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. (c) 2008, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper.
Microchip received ISO/TS-16949:2002 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company's quality system processes and procedures are for its PIC(R) MCUs and dsPIC(R) DSCs, KEELOQ(R) code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip's quality system for the design and manufacture of development systems is ISO 9001:2000 certified.
(c) 2008 Microchip Technology Inc.
DS22083A-page 23
WORLDWIDE SALES AND SERVICE
AMERICAS
Corporate Office 2355 West Chandler Blvd. Chandler, AZ 85224-6199 Tel: 480-792-7200 Fax: 480-792-7277 Technical Support: http://support.microchip.com Web Address: www.microchip.com Atlanta Duluth, GA Tel: 678-957-9614 Fax: 678-957-1455 Boston Westborough, MA Tel: 774-760-0087 Fax: 774-760-0088 Chicago Itasca, IL Tel: 630-285-0071 Fax: 630-285-0075 Dallas Addison, TX Tel: 972-818-7423 Fax: 972-818-2924 Detroit Farmington Hills, MI Tel: 248-538-2250 Fax: 248-538-2260 Kokomo Kokomo, IN Tel: 765-864-8360 Fax: 765-864-8387 Los Angeles Mission Viejo, CA Tel: 949-462-9523 Fax: 949-462-9608 Santa Clara Santa Clara, CA Tel: 408-961-6444 Fax: 408-961-6445 Toronto Mississauga, Ontario, Canada Tel: 905-673-0699 Fax: 905-673-6509
ASIA/PACIFIC
Asia Pacific Office Suites 3707-14, 37th Floor Tower 6, The Gateway Harbour City, Kowloon Hong Kong Tel: 852-2401-1200 Fax: 852-2401-3431 Australia - Sydney Tel: 61-2-9868-6733 Fax: 61-2-9868-6755 China - Beijing Tel: 86-10-8528-2100 Fax: 86-10-8528-2104 China - Chengdu Tel: 86-28-8665-5511 Fax: 86-28-8665-7889 China - Hong Kong SAR Tel: 852-2401-1200 Fax: 852-2401-3431 China - Nanjing Tel: 86-25-8473-2460 Fax: 86-25-8473-2470 China - Qingdao Tel: 86-532-8502-7355 Fax: 86-532-8502-7205 China - Shanghai Tel: 86-21-5407-5533 Fax: 86-21-5407-5066 China - Shenyang Tel: 86-24-2334-2829 Fax: 86-24-2334-2393 China - Shenzhen Tel: 86-755-8203-2660 Fax: 86-755-8203-1760 China - Wuhan Tel: 86-27-5980-5300 Fax: 86-27-5980-5118 China - Xiamen Tel: 86-592-2388138 Fax: 86-592-2388130 China - Xian Tel: 86-29-8833-7252 Fax: 86-29-8833-7256 China - Zhuhai Tel: 86-756-3210040 Fax: 86-756-3210049
ASIA/PACIFIC
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EUROPE
Austria - Wels Tel: 43-7242-2244-39 Fax: 43-7242-2244-393 Denmark - Copenhagen Tel: 45-4450-2828 Fax: 45-4485-2829 France - Paris Tel: 33-1-69-53-63-20 Fax: 33-1-69-30-90-79 Germany - Munich Tel: 49-89-627-144-0 Fax: 49-89-627-144-44 Italy - Milan Tel: 39-0331-742611 Fax: 39-0331-466781 Netherlands - Drunen Tel: 31-416-690399 Fax: 31-416-690340 Spain - Madrid Tel: 34-91-708-08-90 Fax: 34-91-708-08-91 UK - Wokingham Tel: 44-118-921-5869 Fax: 44-118-921-5820
01/02/08
DS22083A-page 24
(c) 2008 Microchip Technology Inc.

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